News and Reviews (August 2012)

Photonic wire bonds

A novel concept for chip-to-chip interconnects

The demand for ever higher data rates poses an increasing challenge for electrical interconnects. Fundamental limitations such as size, speed and crosstalk call for a radically new approach, especially with regard to inter-chip connections. 

In this context, optical interconnects are considered a promising candidate to overcome communication bottlenecks in data centers and high-performance computers. However, while tremendous progress has been made in integrating optical transmitters and receivers on semiconductor chips, there is currently no technology at hand that can cope with these challenges beyond chip edges. 

A group of researchers led by Prof. Christian Koos from Karlsruhe Institute of Technology (KIT), Germany, has now demonstrated a photonic chip-to-chip interconnect, a Photonic Wire Bond (PWB), as they named it1. This concept is illustrated in figure (a).


Taking advantage of live imaging and three-dimensional writing capability of the Photonic Professional, silicon-on-insulator waveguides on separate chips are connected by a freeform polymer PWB, figure (b). The structure is formed by tightly focused femtosecond laser pulses that expose the photoresist precisely along the computed trajectory. The shape of the wire bond is adapted to the position and orientation of the chips, rendering high-precision mechanical alignment unnecessary and bringing industrial-scale application of PWBs into reach, see figure (c). 

Proof-of-principle devices exhibit low losses at infrared telecommunication wavelengths around 1.55 µm and permit transmission of data rates exceeding 5 Tbit/s. This technological approach is considered a breakthrough in optical interconnects.


All pictures: Courtesy of Prof. Christian Koos, Karlsruhe Institute of Technology (KIT/IPQ), Germany

(1) N. Lindenmann, G. Balthasar, D. Hillerkuss, R. Schmogrow, M. Jordan, J. Leuthold, W. Freude and C. Koos, "Photonic wire bonding: a novel concept for chip-scale interconnections", Opt. Express 20, 17667-17677 (2012).